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VLS growth and characterization of axial Si/SiGe heterostructures in NWs for the application of TFET

Jeudi 25 septembre 2014 14:00 - Duree : 2 heures 30 minutes
Lieu : Lecture room P015 - Phelma Polygone - 23 Rue des Martyrs 38000 Grenoble

Orateur : Soutenance de thèse de Priyanka PERIVAL (LTM)

Abstract :

After more than 30 years of successful scaling of MOSFET for increasing the performance and packing density, several limitations to further performance enhancements are now arising, power dissipation is one of the most important one. As scaling continues, there is a need to develop alternative devices with subthreshold slope below 60 mV/decade. In particular, tunnel field effect transistors, where the carriers are injected by quantum band to band tunneling mechanism can be promising candidate for low-power design. But, such devices require the implementation of peculiar architectures like axial heterostructured nanowires with abrupt interface. Using Au catalyzed vapor-liquid-solid synthesis of nanowires, reservoir effect restrains the formation of sharp junctions. In this context, this thesis addresses the growth of axial Si and Si1-xGex heterostructured nanowire with controlled interfacial abruptness and controlled doping using Au catalyzed VLS growth by RP-CVD. Firstly, we identify the growth conditions to realize sharp Si/Si1-xGex and Si1-xGex/Si interfacial abruptness. The two heterointerfaces are always asymmetric irrespective of the Ge concentration or nanowire diameter or growth conditions. Secondly, we study the problematics involved by the addition of dopant atoms and focus on the different approaches to realize taper free NWs. We discuss the influence of growth parameters (gas fluxes (Si or Ge), dopant ratio and pressure) on NW morphology and carrier concentration. With our growth process, we could successfully grow p-I, n-I, p-n, p-i-n type junctions in NWs. Thirdly, we present scanning probe microscopy to be a potential tool to delineate doped and hetero junctions in these as-grown nanowires. Finally, we will integrate the p-i-n junction in the NW in Ω gate configuration.

Contact : thierry.baron@cea.fr

Discipline évènement : (Physique)
Entité organisatrice : (LTM)
Nature évènement : (Soutenance de thèse)
Site de l'évènement : Polygone scientifique

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