MMW circuits in CMOS and perspectives for high-frequency analog circuits using beyond-CMOS technologies

Orateur : José Luis GONZALEZ (CEA-LETI)

In the first part of this seminar there will be presented some circuit design alternatives as well as modeling methodologies that have been used in the last years in the development of mmW building blocks and full systems using CMOS technologies. The issues such as process and temperature variations compensation and calibration will be addressed for 60 GHz VCOs and frequency dividers. Some optimization techniques for passives (inductors and varactors) will also be discussed. A whole transceiver system for WirelessHD standard will be used for illustrating the system level impact of mmW blocks design decisions. Following the trend of increase in the operation frequency, this first part will end with a brief overview of CMOS circuit techniques required for close to, or higher than, fT operation, notably for the 280 GHz band. In the second part of the seminar the carbon nanotube FET transistor (CNT-FET) will be presented as an alternative for beyond-CMOS integrated circuits. Its very high fT and other RF figures of merit will be explored, as well as the main sources of variability that are found in the manufacturing process of CNT-FETs. The RF performance of such devices is compared with state of the art CMOS devices and with the predictions of the ITRS roadmap for the forthcoming years. This seminar will conclude with some perspective about the application to high-speed analog circuits of another beyond-CMOS device that has deserved increasing attention during the last years : the Graphene transistor.

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